Espressif Systems /ESP32-S2 /PMS /PRO_IRAM0_2

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Interpret as PRO_IRAM0_2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PRO_IRAM0_SRAM_4_SPLTADDR0 (PRO_IRAM0_SRAM_4_L_F)PRO_IRAM0_SRAM_4_L_F 0 (PRO_IRAM0_SRAM_4_L_R)PRO_IRAM0_SRAM_4_L_R 0 (PRO_IRAM0_SRAM_4_L_W)PRO_IRAM0_SRAM_4_L_W 0 (PRO_IRAM0_SRAM_4_H_F)PRO_IRAM0_SRAM_4_H_F 0 (PRO_IRAM0_SRAM_4_H_R)PRO_IRAM0_SRAM_4_H_R 0 (PRO_IRAM0_SRAM_4_H_W)PRO_IRAM0_SRAM_4_H_W

Description

IBUS permission control register 2.

Fields

PRO_IRAM0_SRAM_4_SPLTADDR

Configure the split address of SRAM Block 4-21 for IBUS access.

PRO_IRAM0_SRAM_4_L_F

Setting to 1 grants IBUS permission to fetch SRAM Block 4-21 low address region.

PRO_IRAM0_SRAM_4_L_R

Setting to 1 grants IBUS permission to read SRAM Block 4-21 low address region.

PRO_IRAM0_SRAM_4_L_W

Setting to 1 grants IBUS permission to write SRAM Block 4-21 low address region.

PRO_IRAM0_SRAM_4_H_F

Setting to 1 grants IBUS permission to fetch SRAM Block 4-21 high address region.

PRO_IRAM0_SRAM_4_H_R

Setting to 1 grants IBUS permission to read SRAM Block 4-21 high address region.

PRO_IRAM0_SRAM_4_H_W

Setting to 1 grants IBUS permission to write SRAM Block 4-21 high address region.

Links

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